The Elements of Computing  Systems / Nisan & Schocken / www.idc.ac.il/tecs  

Project 1: Logic Gates

Objective: Implement all the logic gates presented in Chapter 1. The only building blocks that you can use are primitive Nand gates and the composite gates that you will gradually build on top of them. 

Resources: The only tool that you need for this project is the hardware simulator supplied with the book. All the chips should be implemented in the HDL language specified in Appendix A. For every one of the chips  mentioned in Chapter 1, we provide a skeletal .hdl program (text file) with a missing implementation part. In addition, for each chip we provide a .tst script file that tells the hardware simulator how to test it, along with the correct output file that this script should generate, called .cmp or "compare file". Your job is to complete the missing implementation parts of all the supplied .hdl programs.

Contract: When loaded into the Hardware Simulator, your chip design (modified .hdl program), tested on the supplied .tst file, should produce the outputs listed in the supplied .cmp file. If that is not the case, the simulator will let you know.

Chip (HDL)	Function	Test script	Compare file
Nand	Nand gate (primitive)
Not	Not gate	Not.tst	Not.cmp
And	And gate	And.tst	And.cmp
Or	Or gate	Or.tst	Or.cmp
Xor	Xor gate	Xor.tst	Xor.cmp
Mux	Mux gate	Mux.tst	Mux.cmp
DMux	DMux gate	DMux.tst	DMux.cmp
Not16	16-bit Not	Not16.tst	Not16.cmp
And16	16-bit And	And16.tst	And16.cmp
Or16	16-bit Or	Or16.tst	Or16.cmp
Mux16	16-bit multiplexor	Mux16.tst	Mux16.cmp
Or8Way	Or(in0,in1,...,in7)	Or8Way.tst	Or8Way.cmp
Mux4Way16	16-bit/4-way mux	Mux4Way16.tst	Mux4Way16.cmp
Mux8Way16	16-bit/8-way mux	Mux8Way16.tst	Mux8Way16.cmp
DMux4Way	4-way demultiplexor	DMux4Way.tst	DMux4Way.cmp
DMux8Way	8-way demultiplexor	DMux8Way.tst	DMux8Way.cmp

Tips: The Nand gate is considered primitive and thus there is no need to build it: whenever you use Nand in one of your HDL programs, the simulator  automatically invokes the built-in tools/builtInChips/Nand.hdl implementation. We recommend implementing the other gates in this project in the order in which they appear in the chapter. However, since the simulator features built-in versions of all these chips, you can always use the chips without defining them first: the simulator will automatically invoke their built-in versions.

For example, consider the skeletal Mux.hdl program supplied in this project. Suppose that for one reason or another you did not complete the implementation of Mux, but you still want to use Mux chips as internal parts in other chip designs. This is not a problem, thanks to the following convention. If our simulator fails to find a Mux.hdl file in the current directory, it automatically invokes a built-in Mux implementation, pre-supplied with the simulator’s software. This built-in Mux implementation -- a Java class stored in the simulator's builtIn directory -- has the same interface and functionality as those of the Mux chip described in the book. Thus, if you want the simulator to ignore one or more of your chip implementations, simply move the corresponding .hdl files out from the current directory.

Steps: We recommend proceeding in the following order:  

0.      The hardware simulator needed for this project is available in the tools directory of the book’s software suite.

1.      Read Appendix A (Hardware Description Language), Sections 1-6 only;

2.      Go through the hardware simulator tutorial (parts I,II,III only), available in the tutorials directory of the book’s software suite;

3.      Create a directory named projects/01 on your computer, extract project 01.zip to it, then build and simulate all the specified chips.